Extending a MIPS Simulator for FPGA Support

Authors

Pete Sanderson, Otterbein UniversityFollow

Document Type

Presentation

Publication Date

2011

Publication Title

SIGCSE '11 Proceedings of the 42nd ACM Technical Symposium on Computer Science Education

Publisher

ACM New York, NY, USA

Keywords

MIPS Code, MARS Simulator

Abstract

This project enriches computer organization education by providing another avenue for execution of MIPS code. The initial and existing avenue is the MARS simulator for MIPS code, a well-established open source product for educational environments, in use at universities and colleges worldwide (http://www.cs.missouristate.edu/MARS). The new avenue is a special adaptation of MIPS circuitry on a Field Programmable Gate Array (FPGA) platform. FPGAs such as the Altera DE2 are very attractive in an educational environment because of their flexibility, re-use, and low cost. The FPGA MIPS circuit includes VGA graphical output for real-time display of the MIPS machine state, including registers, memory, etc. Students write MIPS code and compare its behavior and performance in the two environments of the MARS simulator and the FPGA MIPS hardware.

First Page

5

Last Page

6

Comments

Abstract for Pete Sanderson's

"Extending a MIPS Simulator for FPGA Support", (abstract) Forty Second SIGCSE Technical Symposium on Computer Science Education, Dallas, TX, March 10, 2011.

See attached file for more information

Repository Citation

Sanderson, Pete, "Extending a MIPS Simulator for FPGA Support" (2011). Mathematics Faculty Scholarship. 6.
https://digitalcommons.otterbein.edu/math_fac/6

Original Citation

Baldwin, Douglas, et al. "SIGCSE Special Project Showcase." Proceedings Of The 42Nd ACM Technical Symposium: Computer Science Education (2011): 5

DOI

10.1145/1953163.1953169

Version

Pre-Print

Publisher's Statement

Copyright © 2014 ACM, Inc. Please refer to the full Terms of Use of the Digital Library at http://librarians.acm.org/policies